This page describes how to install Vivado, SDAccel, and an extended competition license from Xilinx for on-premise development. With this install you will be able to run both Vivado and the AWS F1 SDAccel flow locally.
This will work on AWS EC2 but if you are working on AWS we highly recommending using the AWS FPGA AMI as the tools and license are pre-installed. See https://github.com/supranational/vdf-fpga/blob/master/docs/aws_f1.md, and you can jump forward in this guide to see how to run hardware emulation, SDAccel synthesis, Vivado behavioral simulation, and Vivado out-of-context synthesis.
If Vivado is already installed: This assumes a from scratch install. If you already have Vivado installed and want to extend the license or add SDAccel you can skip ahead to Load License. It is important to note that if you originally installed Vivado using sudo then it must be run with sudo to add or remove devices!
This document assumes Ubuntu 18.04 LTS. The tools and OS require about 63GB of disk space.
After logging in (you will need an account) enter your voucher number and select “Redeem Now”.
Select the licenses below and click “Generate Node-Locked License”.
You will have to provide the host MAC address to bind the license to. Be sure to choose a host where you will have long term access. You can find the MAC address by running ‘ifconfig’ in Linux. Look for the wired ethernet connection, then the colon separated 12 digit hex value after “ether”.
The new license will be emailed to you. You will need to download it and make it available on the target host.
git clone https://github.com/supranational/vdf-fpga.git
make clean; make hw_emu
# Expected result: PASSED 1 iterations
If sdaccel_setup.sh fails to complete successfully for any reason it tends to leave the shell in a broken state. This can lead to strange tool errors. In this case it is best to start fresh from a new shell.
Once hardware emulation completes you can perform synthesis to generate a bitstream. This takes several hours.
make clean; make hw
You can also run behavioral simulation and out-of-context synthesis in Vivado. This provides a more interactive environment for development with fast simulation, waveform viewing, GUI based synthesis and design exploration. It is convenient to develop and tune the design here prior to using SDAccel.
To run Vivado choose either the “simple” or “Ozturk” multiplier and launch Vivado using the provided script.
NOTE: AWS FPGA AMI ONLY
If you are running this on an AWS FPGA AMI the above commands will fail due to lack of support for the Spartan-7 family. You can manually select the vu9p part by running the following sed command in vivado_simple of vivado_ozturk.
sed 's/xc7s100fgga676-2/xcvu9p-flga2104-1-e/g' msu.tcl > msu2.tcl
mv msu2.tcl msu.tcl
NOTE: AWS FPGA AMI ONLY
You can run behavioral simulations using the GUI as shown. The test is self checking and should print “SUCCESS”.
In addition to “SUCCESS”, the simulation prints cycles per squaring statistics. This, along with synthesis timing results, provides an estimate of latency per squaring.
To perform synthesis first make sure the correct part (vu9p) is selected by navigating to Settings → Project Device:
Note: If you are an AWS FPGA Developer AMI the vu9p should already be selected
Select part xcvu9p-fsgd2104-2L-e:
Run out-of-context synthesis + Implementation to understand and tune performance. A pblock is set up to mimic the AWS F1 Shell exclusion zone. In our experience these results are pretty close to what you will get on F1 and and provide an easier/faster/more intuitive interface for improving the design.